Faculty Profile

Dr. ARAVALLI SAINATH CHAITHANYA

ASSISTANT PROFESSOR

Electronics and Communications Engineering

Qualification Ph.D., M.Tech., B.Tech., UGC-NET qualified
Specialization Computer Vision
Employee ID RTEC160344

Pattern Recognition and Intelligent Image Analysis, Deep Learning for Visual Computing Applications, Machine Learning for Healthcare and Industrial Domains, VLSI System-on-Chip (SoC) Design and Verification.

DegreeProgramme / Specialization University / Board
Ph.D. Computer Vision University College of Engineering, Osmania University
M.Tech VLSI System Design Anurag Group of Institutions, JNTU Hyderabad
B.Tech Electronics and Communication Engineering JNTU Hyderabad
Institution / OrganizationDesignation FromTo
RGUKT-Basar Asst. Professor September 2016 till date
UTL Technologies, Bangalore Trainee Engineer June 2016 September 2016
Centre for Intelligent Machines and Robotics (CIMAR), BHEL R&D, Hyderabad Intern Nov 2014 May 2015
  1. Secured 2nd Rank in the entrance examination for the Visvesvaraya PhD Scheme for Electronics and IT, sponsored by the Ministry of Electronics and Information Technology (MeitY), Government of India, and was admitted to the PhD programme at Osmania University.
  1. FDP-"Designing with ZYNQ Soc and its applications" held at JNTU-Hyderabad oct’19 by CoreEL Technologies
  2. FDP-Medical Image processing and 3D Applications
  3. FDP-Medical Image Processing & its applications in Automated Disease Detection
  4. Workshop-5G and Emerging Technologies
  1. Seminar -“MATLAB EXPO 2019 INDIA” organized by Capricot Technologies. on Feb ’19.
  2. Webinar-Block Level Design Using IP Integrator in Xilinx Vivado in association with CoreEL Technologies and Xilinx
  3. Webinar-Physical Design and Challenges in VLSI:: CoreEL Technologies on June’20
  1. Digital System Design
  2. VLSI Engineering
  3. Signals and Systems
  4. Probability Theory and Stochastic Processes
  5. Image Processing
  6. Computer Vision
  7. Wireless Communications
  8. Digital System Design Lab; Microcontroller Interfacing Lab; Digital Signal Processing Lab; Analog Electronics Lab; Digital Electronics Lab
  1. B.Tech - 180+ academic projects till date
  2. M.Tech- 1 research project
  1. Mess Warden: Feb 2026-till date
  2. Hostel Warden: September 2024-December 2024
  3. Department Faculty Coordinator – Summer Internship Programmes for Third-Year Students (AY 2025–26 and 2026–27).
  4. Department Faculty Coordinator – Technical Fest (AY 2025–26).
  5. Department Faculty Coordinator – Final-Year Projects (AY 2018–19, 2023–24, and 2024–25)
  6. Member, Department Academic Planning Committee (AY 2020–21 and 2021–22)
  7. Coordinated departmental seminars and comprehensive viva voce examinations