Faculty Profile
Dr. ARAVALLI SAINATH CHAITHANYA
ASSISTANT PROFESSOR
Electronics and Communications Engineering
Qualification
Ph.D., M.Tech., B.Tech., UGC-NET qualified
Specialization
Computer Vision
Employee ID
RTEC160344
Research Interests
Pattern Recognition and Intelligent Image Analysis, Deep Learning for Visual Computing Applications, Machine Learning for Healthcare and Industrial Domains, VLSI System-on-Chip (SoC) Design and Verification.
Education
| Degree | Programme / Specialization | University / Board |
|---|---|---|
| Ph.D. | Computer Vision | University College of Engineering, Osmania University |
| M.Tech | VLSI System Design | Anurag Group of Institutions, JNTU Hyderabad |
| B.Tech | Electronics and Communication Engineering | JNTU Hyderabad |
Work Experience
| Institution / Organization | Designation | From | To |
|---|---|---|---|
| RGUKT-Basar | Asst. Professor | September 2016 | till date |
| UTL Technologies, Bangalore | Trainee Engineer | June 2016 | September 2016 |
| Centre for Intelligent Machines and Robotics (CIMAR), BHEL R&D, Hyderabad | Intern | Nov 2014 | May 2015 |
Achievements (1)
- Secured 2nd Rank in the entrance examination for the Visvesvaraya PhD Scheme for Electronics and IT, sponsored by the Ministry of Electronics and Information Technology (MeitY), Government of India, and was admitted to the PhD programme at Osmania University.
Workshops & FDPs (4)
- FDP-"Designing with ZYNQ Soc and its applications" held at JNTU-Hyderabad oct’19 by CoreEL Technologies
- FDP-Medical Image processing and 3D Applications
- FDP-Medical Image Processing & its applications in Automated Disease Detection
- Workshop-5G and Emerging Technologies
Seminars & Conferences Attended (3)
- Seminar -“MATLAB EXPO 2019 INDIA” organized by Capricot Technologies. on Feb ’19.
- Webinar-Block Level Design Using IP Integrator in Xilinx Vivado in association with CoreEL Technologies and Xilinx
- Webinar-Physical Design and Challenges in VLSI:: CoreEL Technologies on June’20
Subjects Taught
- Digital System Design
- VLSI Engineering
- Signals and Systems
- Probability Theory and Stochastic Processes
- Image Processing
- Computer Vision
- Wireless Communications
- Digital System Design Lab; Microcontroller Interfacing Lab; Digital Signal Processing Lab; Analog Electronics Lab; Digital Electronics Lab
Projects Guided (2)
- B.Tech - 180+ academic projects till date
- M.Tech- 1 research project
Administrative Experience
- Mess Warden: Feb 2026-till date
- Hostel Warden: September 2024-December 2024
- Department Faculty Coordinator – Summer Internship Programmes for Third-Year Students (AY 2025–26 and 2026–27).
- Department Faculty Coordinator – Technical Fest (AY 2025–26).
- Department Faculty Coordinator – Final-Year Projects (AY 2018–19, 2023–24, and 2024–25)
- Member, Department Academic Planning Committee (AY 2020–21 and 2021–22)
- Coordinated departmental seminars and comprehensive viva voce examinations